Course Syllabus

1. Introduction to Technology and Architecture(*)
   1. Impact of technology on computer architecture
   2. Evolution of computer architecture
2. Associative Memory (CAM)
   1. Hardware concepts of CAM
   2. Lewin's O(n) sorting algorithm
3. Cache Memory(*)
   1. Basic cache structure
   2. Set associative caches
   3. Evaluating Cache performances
   4. Determining Cache parameters
   5. Replacement Policies
   6. Implementing LRU replacement policies
   7. Detail example of a cache memory system
4. Virtual Memory(*)
   1. Basic virtual memory structure
   2. Translation lookaside buffer
   3. Segment tables
   4. Replacement algorithms
   5. Detail example of a virtual memory system
5. Pipeline Techniques(*)
   1. Principles of Pipelined computers
   2. Evaluating performance of pipelined computers
   3. Reservation tables and collision vectors
   4. Maximizing pipeline performance
   5. Conditional branches in pipelined computers
   6. Internal forwarding and deferred instructions
6. Reconfigurable computer architectures
   1. Reconfigurable busses
   2. Addition in time O(1)
7. Multiprocessors
   1. Flynns classification of multiprocessors
   2. Vector computers(*)
      1. Numerical algorithms on a vector computer
      2. Pipelining in vector computers
      3. Examples of vector computers, e.g. Cray
   3. Multiprocessor interconnections(*)
   4. General purpose multiprocessors, e.g. RP-1, HEP
   5. Data flow computers
8. RISC computers(*)
   1. Pipelined structure of the CPU
   2. RISC characteristics
   3. Detail example of a RISC computer

(*) This topic is core material to be covered every time the course is taught.